Regional Symposium on Innovation in science and technology

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Hardware Implementation of the DVI Protocol for Displaying Neural Network and Image Processing Outputs on FPGA ML605

Authors :

Saeed Yazdani¹ Danial Bayati² Sara Ershadinasab³

1- دانشگاه فردوسی مشهد 2- دانشگاه فردوسی مشهد 3- دانشگاه فردوسی مشهد

Keywords :

ML605 Field-Programmable Gate Array،Digital Visual Interface،Neural networks،Image Processing

Abstract :

This paper presents the implementation and testing of the Digital Visual Interface (DVI) protocol on the ML605 FPGA hardware. The goal was to create a DVI transmitter capable of converting VGA output to DVI pinouts while adhering to protocol standards. Using VHDL and the Xilinx Virtex-6 architecture, the system successfully met DVI specifications and demonstrated its applicability in displaying outputs from neural networks and image processing tasks.

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